The present invention relates to an electronic timepiece having ROM.multidot.RAM.multidot.CPU-system, further relates to a construction of a switch input circuit.
In the conventional electronic timepiece of ROM.multidot.RAM.multidot.CPU-system, a program of being memorized in ROM is acted in every one second whereby a time operation is acted. A treatment of a switching operation during operation is executed by a sharing treatment.
However, if the system stops a time operation in progress and executes an operation according to a switch operation, the program and circuit construction becomes a complicated.
The present invention aims to eliminate the above noted difficulty and insufficiency, the object of the present invention is to provide a ROM.multidot.RAM.multidot.CPU-system which is preferable for an electronic timepiece.
Further the present invention aims to continuously operate a time operation by employing a memory for memorizing a switch condition applied to a switch input circuit in spite when a normal time operation is being executed, whereby it is able to obtain a system in which a sharing is not necessary by delaying execution of the operation corresponding to the switch operation until after the time operation is finished.